Analog Layout Design Engineer (Intern)
Job Details:
Job Description:
Job Summary
Altera is seeking an enthusiastic and motivated Analog Layout Design Engineer Intern to join our dynamic team. This internship offers a unique opportunity to gain hands-on experience in the physical design of analog and mixed-signal circuits for cutting-edge semiconductor products.
Job Responsibilities
* Assist senior engineers in the physical layout design of various analog and mixed-signal blocks, including ADCs, DACs, PLLs, high-speed interfaces, and power management circuits.
* Perform layout verification tasks such as DRC (Design Rule Check), LVS (Layout Versus Schematic), and antenna checks using industry-standard EDA tools.
* Collaborate with circuit designers to understand design requirements and optimize layouts for performance, area, and power.
* Document layout methodologies and contribute to design reviews.
* Participate in the debugging and resolution of layout-related issues.
* Learn and apply Altera's design methodologies and quality standards.
Qualifications:
Job Qualifications
* Currently pursuing a Bachelor's, Master's, or Ph.D. degree in Electrical Engineering, Computer Engineering, or a related field.
* Basic understanding of analog circuit theory and semiconductor device physics.
* Familiarity with IC layout concepts and design rules.
* Some exposure to EDA tools such as Cadence Virtuoso, Mentor Graphics Calibre, or similar is a plus.
* Strong analytical and problem-solving skills.
* Excellent communication and teamwork abilities.
* Ability to work independently and as part of a team in a fast-paced environment.
* Prior internship experience in semiconductor design is a bonus but not required.