FPGA Engineer
Xovian Aerospace is deploying AI\-Native RF satellite infrastructure for providing 24x7 real\-time Geospatial and Signals Intelligence (GEOINT & SIGINT). The startup aims at cutting down the human & economic toll and bring operational efficiency across industries by providing asset monitoring and situational awareness through its RF satellite driven, sector agnostic decision Intelligence platform.
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The startup's team is comprised of Ex\-ISRO personnel & Industry Experts with vast Experience in Satellite Missions and has won multiple national awards for its innovative indigenous developments.<\/span>
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RF Signal Processing & FPGA Engineer<\/span>
Core Mission
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RF Signal Processing & FPGA Engineer<\/span>
Core Mission
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Design and implement real\-time digital processing architectures capable of extracting structured insights from complex RF environments, including weak, indirect, and overlapping signals.<\/span><\/span>
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Key Responsibilities
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\u2022 Design digital signal processing pipelines for signal detection, classification, and extraction<\/span><\/span>
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\u2022 Develop algorithms for delay estimation, frequency shift analysis, and phase\-based measurements<\/span><\/span>
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\u2022 Implement multi\-channel correlation and synchronization pipelines<\/span><\/span>
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\u2022 Design and implement DDC/DUC architectures for wideband signal capture<\/span><\/span>
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\u2022 Develop RTL pipelines (VHDL/Verilog) for high\-throughput real\-time processing<\/span><\/span>
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\u2022 Interface with high\-speed ADC/DAC systems (JESD, LVDS, etc.)<\/span><\/span>
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\u2022 Optimize latency, throughput, and power for onboard processing<\/span><\/span>
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\u2022 Enable real\-time data reduction and preprocessing before downlink<\/span><\/span>
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\u2022 Support SDR\-based prototyping and simulation environments<\/span><\/span>
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Core Competencies
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\u2022 Strong DSP and statistical signal processing foundation<\/span><\/span>
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\u2022 FPGA design (VHDL/Verilog/SystemVerilog)<\/span><\/span>
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\u2022 Python, MATLAB, C/C++ for modeling and validation<\/span><\/span>
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\u2022 Understanding of real\-time systems and high\-speed data pipelines<\/span><\/span>
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Requirements<\/h3>
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Requirements<\/h3>Preferred Background
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<\/span><\/b><\/div>\u2022 4\-6 years in signal processing, FPGA, or RF sensing systems<\/span>
<\/span>\u2022 Experience in SDR, spectrum monitoring, or remote sensing domains<\/span>
<\/span>\u2022 Exposure to working with non\-ideal or low SNR signal environments<\/span><\/b><\/div><\/span>
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\u2022 4\-6 years in signal processing, FPGA, or RF sensing systems<\/span>
<\/span>\u2022 Experience in SDR, spectrum monitoring, or remote sensing domains<\/span>
<\/span>\u2022 Exposure to working with non\-ideal or low SNR signal environments<\/span><\/b><\/div><\/span>
<\/span>\u2022 Experience in SDR, spectrum monitoring, or remote sensing domains<\/span>
<\/span>\u2022 Exposure to working with non\-ideal or low SNR signal environments<\/span><\/b><\/div><\/span>