Performance Modeling Architect – AI Systems
You will build and maintain modeling and simulation frameworks that capture interactions between AI models, software runtimes, and hardware systems. You will model SoC components such as compute units, memory hierarchies, and interconnects, incorporate runtime behavior, and analyze system bottlenecks. You will use simulations to evaluate performance, latency, throughput, and energy efficiency, and collaborate with hardware architects and software teams to translate modeling results into concrete architectural guidance.
Responsibilities
- Develop system-level performance models for AI workloads and compute architectures
- Build simulation frameworks that capture interactions between AI models software runtimes and hardware systems
- Model key components of SoC architecture including compute units memory hierarchies and interconnects
- Incorporate relevant software and runtime behavior into modeling frameworks to reflect realistic system execution
- Analyze system bottlenecks and evaluate architectural tradeoffs across the platform
- Work closely with hardware architects to guide microarchitectural and system-level design decisions
- Collaborate with software and ML teams to incorporate realistic workloads into modeling frameworks
- Use modeling and simulation to evaluate performance latency throughput and energy efficiency across target applications
Requirements
- Strong background in computer architecture system architecture or performance modeling
- Experience building simulation or analytical models of complex hardware systems
- Strong programming skills (Python C++ or similar) for modeling and simulation frameworks
- Understanding of modern compute architectures such as CPU GPU or AI accelerator
- Ability to analyze complex systems and identify performance bottlenecks
- Strong quantitative reasoning and ability to translate models into architectural insights
- Experience modeling AI workloads or machine learning systems (preferred)
- Familiarity with architectural simulators or performance modeling tools (preferred)
- Experience with memory systems interconnect architectures or accelerator design (preferred)
- Exposure to hardware-software co-design methodologies (preferred)