SoC Architect – Robotics & Physical AI
You will define the architecture of next-generation SoCs for physical AI systems and work across the full stack — from external interfaces and data flows to on-chip fabrics, memory systems, and compute partitioning. You will map real-time sensor processing, AI inference, and control loops onto silicon, make trade-offs between latency, bandwidth, and power, design and optimize on-chip fabrics and memory hierarchies, implement QoS and latency-sensitive traffic handling, and collaborate with software and AI teams to characterize workloads and drive system-level decisions. You will contribute to a clean-sheet architecture targeted at robotics and edge AI platforms.
Responsibilities
- Define end-to-end SoC architecture for physical AI systems
- Drive hardware-software co-design with AI systems and software teams
- Architect dataflows and interconnects across compute, memory, and I/O
- Design and optimize on-chip fabrics and interconnects
- Design and optimize memory hierarchy and controllers
- Implement QoS and latency-sensitive traffic handling
- Balance performance power and real-time constraints across the system
- Collaborate on workload characterization and system-level tradeoffs
- Contribute to a clean-sheet architecture targeting next-generation robotics platforms
Requirements
- Experience architecting or designing complex SoCs or system platforms
- Strong understanding of system dataflows and bottlenecks
- Strong understanding of memory systems and bandwidth management
- Strong understanding of on-chip interconnects and fabrics
- Familiarity with real-time and latency-sensitive systems
- Solid grounding in hardware-software co-design principles
- Awareness of low-power design tradeoffs
- 5+ years of relevant experience
- Bonus: Experience with robotics autonomous systems or edge AI platforms
- Bonus: Exposure to AI/ML workloads or accelerators