Staff Verification Engineer

ONSEMI’s Power Management Division is hiring a Staff Verification Engineer with solid experience in both top‑level and block‑level verification of integrated circuits using SystemVerilog, UVM, and assertion‑based verification.

The ideal candidate is capable of working effectively in a global team environment, extracting hardware and firmware design information from specifications, and creating comprehensive verification plans that maximize functional and code coverage targets.

Responsibilities

• Create top‑level and block‑level verification test plans based on specifications of power‑management integrated circuits.
• Drive quality to achieve maximum code and functional coverage targets.
• Promote innovation in verification methodologies and technologies.
• Ensure full verification coverage of all integrated‑circuit components, including both hardware and software.
• Analyze and debug failures, identifying root causes and proposing corrective actions.
• Lead projects from the planning phase through mass‑production delivery, with a focus on pre‑silicon performance.
• Provide clear written and verbal communication to the development team regarding coverage reviews, code reviews, deliverables, project updates, and issues.

Required Qualifications

• BSEE/MSEE or equivalent, with a minimum of 5–6 years of relevant experience.
• Solid knowledge of UVM.
• Strong understanding of industry‑standard EDA tools.
• Proven experience in debugging complex designs.
• Experience with Assertion‑Based Verification (PSL and SVA).
• Experience with formal methodology for functional coverage.
• Proficiency in scripting languages such as TCL, CSH, and Python.
• Understanding of analog and mixed‑signal IC architectures and integration requirements.
• Passionate, self‑driven, and capable of working effectively with remote teams.
• Excellent verbal and written communication skills.

Preferred Qualifications

• Experience with co‑verification.
• Familiarity with Jama and Jira.
• Experience with multiphase switching regulators.
• Knowledge of analog & mixed-signal IC architectures and integration requirements..