RFIC Layout Engineer

As an RFIC Layout Designer, you will be a key member of a RFIC team, researching, designing and bringing the next-generation of wireless technologies into high-volume production in advanced CMOS technology nodes. In this role, you will work closely with the RFIC design team to layout and verify custom RF and analog IP for complex SoC products. You will have a critical impact on developing Apple’s state-of-the-art radios and getting them into hundreds of millions of products. Minimum Qualifications 5+ year minimum related experience required. Experience in custom RF/analog layout for radio transceivers with extensive knowledge of deep sub-micron CMOS. High level proficiency in interpretation of CALIBRE DRC, ERC, LVS in FinFet Technology. Knowledge of Cadence layout tools. Preferred Qualifications Knowledgeable in layout techniques for device matching, minimizing parasitics, RF shielding, and high frequency routing. Solid understanding of RC delay, electromigration, and coupling. Understanding of guard rings, DNW, PN junctions, and advanced process effects such as LOD and WPE. Excellent communication skills and able to work with cross-functional teams. Scripting skills in PERL or SKILL.